1. Field of the Invention
The present invention relates to an active matrix type liquid crystal display provided with a thin film transistor (hereinafter, referred to as TFT) as a switching element, and specifically relates to the liquid crystal display provided with an electrostatic protection element protecting the TFT formed on a substrate on an array side and areas between bus lines from a destruction or a shortage due to static electricity.
2. Description of the Related Art
The active matrix type LCD is widely used in computers or equipment for the use of OA (Office Automation) as a flat panel display providing superior picture quality. In this active matrix type LCD, a voltage is applied from both electrodes to a liquid crystal layer sealed between the substrate on the array side forming a TFT and pixel electrode and an opposing substrate forming common, thereby driving the liquid crystal display.
A plurality of gate bus lines to which a scanning signal is sequentially input to select a driving display pixel are formed in parallel to each other on the substrate on the array side. Further, an insulation film is formed on the plurality of gate bus lines, and a plurality of data bus lines substantially orthogonal to the gate bus lines are formed on an insulation film. Each area decided by the plurality of gate bus lines and the plurality of data bus lines formed orthogonal to each other in a matrix shape becomes a pixel area, and the TFT and the display electrode are formed in each pixel area. A gate electrode of the TFT is connected to a predetermined gate bus line, a drain electrode is connected to a predetermined data bus line, and a source electrode is connected to the display electrode in the pixel area.
Incidentally, since the TFT for controlling the operation of liquid crystal of the TFT-LCD, gate bus lines, data bus lines and the like are formed on the glass substrate which is an insulation material, the TFT, gate bus lines, data bus lines and the like are basically weak against static electricity. Therefore, if static electricity is generated on the substrate on the array side during a period from the substrate process on the array side constructing the TFT to the panel process sealing liquid crystal by attaching the substrate on the array side and the opposing substrate and mounting a driver IC and the like, defects such as a destruction of the TFT, a change in characteristics of the TFT, a shortage between each of the bus lines are generated, thereby resulting in a considerable reduction in fabrication yield of panels. Thus, a reliable measure to protect the elements and the bus lines on the substrate on the array side from static electricity is required.
As a measure to protect the substrate on the array side from static electricity, for example, a method connecting all the bus lines to a common electrode (short ring) to keep the same potential is known. The short ring is formed by materials for the data bus lines or the gate bus lines when the data bus lines or the gate bus lines are formed. Thus, each bus line is electrically connected with the value of resistance less than several kΩ. Therefore, even if a specific area on the panel is charged with electricity, the electric charges are instantly dispersed, thereby preventing the TFT in a display from a device destruction or a change in characteristics.
However, according to this method, since each bus line is short-circuited to each other, an independent signal can not be applied to each bus line. Therefore, a problem occurs, in which an array inspection (a TFT inspection) performing a characteristic test of the TFT of each pixel by detecting the amount of electric charges when the electric charges are kept between the pixel electrode and the common electrode in the display panel can not be performed. Further, since the short ring electrically connects the adjacent bus lines at low resistance, the short ring is required to be removed either in the panel process or in the unit assembling process after the panel is completed. Thus, a problem exists in which a measure against static electricity is not taken in the processes after the unit assembling process.
Accordingly, a method of arranging a resistive component between the short ring and each bus line is conceived. FIG. 28 is a diagram describing the conventional technology connecting the resistive component between the bus line and the short ring, which is disclosed in the publication of Japanese Laid Open Patent Application No. 8-101397. FIG. 28 shows a part of a substrate surface on the array side and a resistance layer 400 is formed by patterning an ITO (indium tin oxide) formed on a gate metal or on a drain metal into a zigzag line at the end portion of a bus line 504. A tip of the zigzag-shape resistance layer 400 is connected to a short ring 506. The array inspection is possible according to this structure. Normally, this resistance layer 400 and the short ring 506 are removed by disconnecting a scribe line SL shown by the dotted line in the diagram in the panel scribe process when assembling the panel.
However, according to this method, in order to obtain a higher resistance using ITO, an area is required to secure the distance of the zigzag-shape. Thus, a problem that an external size of the panel becomes large exists.
Besides the methods described above, a method for inserting an electrostatic protection element such as a transistor and the like between the bus line and the short ring is conceived. For example, in the publication of Japanese Laid Open Patent Application No. 61-79259, a method of connecting the gate electrode and the source/drain electrode by a capacitive coupling is shown.
FIGS. 29a and 29b are diagrams describing the conventional technology shown in the publication of Japanese Laid Open Patent Application No. 61-79259. FIG. 29a shows a state of a part of the substrate on the array side when viewing toward the substrate and FIG. 29b shows a cross section of the electrostatic protection element. As shown in FIG. 29a, an electrostatic protection element 500 has a TFT structure arranged between an external output electrode 504 at the end portion of a bus line 502 and the short ring 506. The electrostatic protection element 500 is formed by the same process as the TFT formed in the pixel area on a glass substrate 508. As shown in FIG. 29b, a gate electrode 510 is formed on the glass substrate 508 and an operating semiconductor layer 514 composed of, for example, amorphous silicon (hereinafter, abbreviated as a-Si) is formed on the gate electrode 510 via a gate insulation film 512. A protection film 520 is formed on the operating semiconductor layer 514 and a source electrode 518 and a drain electrode 516 are formed on both sides of the operating semiconductor layer 514 sandwiching the protection film. The drain electrode 516 is connected to the short ring 506 and the source electrode 518 is connected to the external output electrode 504. When viewing to the direction of the substrate surface, the gate electrode 510 has a plane overlapping with the source/drain electrodes 518 and 516 and is connected with the source/drain electrodes 518 and 516 by capacitive coupling. Therefore, when high voltage is generated due to static electricity between the source/drain electrodes 518 and 516, since the potential of the gate electrode 510 becomes the middle of the potential difference generated between the source/drain electrodes 518 and 516, a channel is created at the operating semiconductor layer 514, thereby releasing the electric load due to static electricity from the bus line 502.
However, since the structure of this electrostatic protection element 500 has a single structuring element, the redundancy is poor. In other words, since high voltage due to static electricity is received by only one TFT, the electrostatic protection element 500 is easily destroyed and when the area between the bus line 502 and the short ring 506 is insulated due to the destruction, the possibility of the TFT in the pixel area to be exposed to static electricity increases. Further, even if irregularities due to static electricity do not occur, if the electrostatic protection element 500 is short-circuited due to some reason, a TFT test can not be performed.
Next, the electrostatic protection circuit having more redundancy than the structure shown in FIGS. 29a and 29b which is disclosed in the publication of Japanese Laid Open Patent Application No.10-303431 is described with reference to FIG. 30. The source electrode (S) of the first TFT 530 which is the electrostatic protection element is connected to an external output electrode 502 of the bus line, and the drain electrode (D) on the other side is connected to the short ring 506. The gate electrode (G) of the first TFT 530 is connected to a conductor 536 which is electrically floated from both the external output electrode 502 and the short ring 506. On the other hand, the source electrode (S) and the gate electrode (G) of the second TFT 532 are connected to the external output electrode 502 of the bus line and the drain electrode (D) on the other side is connected to the conductor 536. Further, the drain electrode (D) of the third TFT 534 is connected to the conductor 536 and the source electrode (S) and the gate electrode (G) on the other side are connected to the short ring 506. When positive high voltage is generated in the bus line with respect to the short ring 506 due to static electricity, high voltage is applied to the gate electrode (G) of the second TFT 532 and a channel is formed, thereby rapidly increasing the conductivity. On the other hand, since the gate electrode (G) of the third TFT 534 is connected to the short ring 506, a channel is not formed and the conductivity remains to be very small. This difference in conductivity is very large, and in consequence, the potential of the conductor 536 is substantially equal to the potential of the bus line. As a result, a channel is formed by applying the voltage between the bus line and the short ring 506 at the gate electrode of the first TFT 530 which is the electrostatic protection element and the electric charge can be released. It will be noted that the second and the third TFT's 532 and 534 do not basically run the current and are used only to control the gate potential of the first TFT 530.
In this manner, in the above electrostatic protection circuit, since the gate electrodes of the second and the third TFT's 532 and 534 are connected to the external output electrode 502 of the bus line or the short ring 506, the potential difference between the external output electrode 502 and the short ring 506 is instantly liquidated. However, when the voltage generated by static electricity reduces as the time passes, the potential of the conductor 536 also reduces and the conductivity of the first TFT 530 reduces. Thus, when the voltage is relatively low (˜ several volts) due to static electricity, the efficiency of releasing the electric charges is reduced.
Also, based on the previous fabrication experiences, obstacles due to static electricity are known to occur by sharp pulse-like static electricity at extremely high voltage for a short period of time and static electricity continuously applied to each element for a long period of time even if the voltage is relatively low. Therefore, although the electrostatic protection circuit described in the publication of Japanese Laid Open Patent Application No. 10-303431 can be expected to be effective in the former case, little result is expected in the latter case as the path for the current to escape is cut off when the voltage is reduced to a certain extent. Further, according to the electrostatic protection circuit described in the above publication, since the current due to static electricity all flows in the first TFT, the redundancy is poor and the load is exceedingly increased, therefore the possibility of the first TFT being destroyed exists. Furthermore, since the gate electrode (G) of the second TFT 532 is directly connected with the external output electrode 502 of the bus line and the gate electrode (G) of the third TFT 534 is directly connected with the short ring 506, the redundancy against shortage is reduced.
As still another conventional electrostatic protection circuit, there is a structure shown in FIG. 31, which is described in the publication of Japanese Laid Open Patent Application No. 7-60875. This is an electrostatic protection circuit connecting between the bus line 504 and the short ring 506 via a resistive component by a two-way transistor using non-linear elements 402 and 404. Besides the two-way transistor, a non-linear element such as a Schottky diode, which can be a resistive component, may be also used. Since the resistive component by the non-linear element has a sufficient high resistive component so as not to affect the operation of each bus line, the resistive component by the non-linear element can remain the panel is completed. Further, as to static electricity, since some current which can disperse electric charge flows, the resistive component of the non-linear element functions as an anti-electrostatic element.
Although in the method arranging the high resistive component by the non-linear element such as the two-way transistor, the high resistive component can be formed in a relatively small area, problems occur with respect to controlling the current since the structure of the device becomes complex and moreover the resistive component is altered by an external charges (for example, static electricity) owing to the non-linear element. Further, since the high resistive component can not be formed outside the ensured area for operation of operating semiconductor film of the transistor such as the area adjacent to an end face of glass, a problem of not being able to make the size of the panel large against a mother glass exists.
Accordingly, although the short ring is required to be removed in the panel process or in the unit assembly process after the panel is completed according to the conventional liquid crystal display, a problem exists in which a measure against static electricity can not be taken in the processes after the short ring is removed.
Further, in the method arranging the zigzag pattern using the ITO, a problem exists in which if the length of the zigzag pattern is long, the external size of the panel becomes large.
Furthermore, the conventional liquid crystal display has problems in which the electrostatic protection element (circuit) for preventing a device destruction due to static electricity is poor in redundancy, the area between the bus line and the short ring is easily short-circuited or the electrostatic protection element does not function as a protection circuit against the static electricity generating relatively low voltage for a long period of time.
Also, if the non-linear element such as the two-way transistor is used as the high resistive component, the structure of the device becomes complex and the aspect of controlling the current is disadvantageous as well. Further, since the non-linear element can not be formed adjacent to the end face of the glass, a problem of not being able to make the size of the panel large against the mother glass exists.